AREA EFFICIENT DECIMATION FILTER BASED ON MERGED DELAY TRANSFORMATION FOR WIRELESS APPLICATIONS
Abstract
Expected by 2014 is the 4G standard for cellular wireless communications, which will improve bandwidth, connectivity and roaming for mobile and stationary devices.4G and other wireless systems are currently hot topics of research and development in the communication field. In wireless technologies like Global System for Mobile (GSM), Digital Enhanced Cordless Telecommunications (DECT) and Wi-Fi, decimation filters are essential part of transceivers being used. This paper describes a decimation filter which is efficient in terms of both the power consumption and the area used. The architecture is based upon Merged Delay Transformation (MDT). The existing Merged Delay Transformed Infinite Impulse Response (IIR) architecture is power efficient but requires larger area. The proposed and existing filters were implemented on Field-Programmable Gate Array (FPGA). The computational cost of the proposed filter is reduced to (3N/2 + 1) and M-1 times reduction in the number of multipliers in comparison to the existing FIR filter is achieved. The power consumption and speed remain nearly the same.References
C.J. Barrett, Low-Power Decimation Filter
Design for Multi-Standard Transceiver
Applications, M.Sc. thesis, University of
California, Berkeley (1997).
G. Adel, N. Lirida, G. Khaled, IEEE
Transactions on Wireless Communications 1,
No. 4 (2002) 558.
M.R.K. Rajaram, B. Sakkarapani and
S. Vishal, Efficient Design and Synthesis of
Decimation Filters for Wideband Delta-Sigma
ADCs, SOC Conference (2011).
Ze Toa, Multi-Standard Delta-Sigma Decimation Filter Design, M.Sc. Thesis, KTH Royal
Institute of Technology, Stockhom, Sweden
(2006).
T.K. Shahana,. R.J. Babita, K.P. Jacob and
S. Sasi, International Journal of Information
and Communication Engineering 5, No. 2
(2009) 154.
R. Lagadec, Dispersive Models for A-to-D
and D-to-A Conversion Systems, AES
thConvention (March 1984).
S. Green, A New Perspective on Decimation
and Interpolation Filters, Cirrus Logic Inc.
(2004).
U. Farooq, Efficient Architectural Transformation of Multirate Recursive Filters, Ph.D
Thesis, EED University of Engineering &
Technology Taxila, Pakistan (2008).
U. Farooq, H. Jamal and S.A. Khan,
Research Letters in Signal Processing,
Article ID 53296, 3 pages (2007)
doi:10.1155/2007/53296
J. Carletta, R. Veillette, F. Krach and
Z. Fang, Determining Appropriate Precisions
for Signals in Fixed Point IIR Filters, DAC
(2003) ACM.
F.J. Harris, Multirate Signal Processing for
Communication Systems, Prentice Hall PTR,
New Jersey (2006).
N.H. Rollins, Reducing Power in FPGA
Designs Through Glitch Reduction, M. Sc.
Thesis, Department of Electrical and
Computer Engg. Brigham Young University
(April 2007).